Among electronic components, there are ones having a semiconductor device in which a semiconductor element is formed. In the semiconductor device, for example, a semiconductor element and another circuit are formed on a silicon substrate. When a plurality of semiconductor devices are mounted on a circuit substrate of one electronic component, performance of the electronic component increases. Further, when a plurality of semiconductor devices are mounted on a circuit substrate in a stacked manner, the electronic component is made small. When semiconductor devices are stacked, a second semiconductor device is mounted on a first semiconductor device, and thereafter respective electrodes of the semiconductor devices are electrically connected to each other by wire bonding.
Thus, to mount a plurality of semiconductor devices in a stacked manner, electrodes of the semiconductor device on the lower side are formed at a position exposed from the semiconductor device on the upper side. Therefore, to stack the semiconductor devices using wire bonding, it is important to make the size of the semiconductor device on the upper side smaller than the size of the semiconductor device on the lower side. However, it is difficult to reduce the size of the semiconductor device on the lower side.
In recent years, a through-electrode (TSV, through-silicon via) penetrating a silicon substrate is formed in a semiconductor device. The through electrode has a structure in which a conductive material such as copper is embedded in a through hole penetrating a silicon substrate.
Here, a conventional method for forming a TSV will be described. First, wires of a first layer are formed over a silicon substrate. Subsequently, an interlayer insulating film is formed on the wires of the first layer. Thereafter, a via hole penetrating the interlayer insulating film and reaching a predetermined depth in the silicon substrate is formed by dry etching. After an insulating film is formed in the via hole, an adhesive layer and a seed layer are formed. Thereafter, metal is filled in the via hole by electrolytic plating. Metal remaining on the interlayer insulating film and the adhering layer are removed to expose a surface of the interlayer insulating film and a surface of the metal embedded in the via hole. An oxide film is formed on an inner wall of the via hole to secure the insulating property of the via hole, thereby preventing diffusion of metal embedded in the via hole.
Subsequently, wires are formed over the interlayer insulating film. Thereafter, a back surface side of the silicon substrate is dry-etched or wet etched to expose a back surface side of the through electrode. To an end surface of the exposed through electrode, a bump is joined. The through electrode is electrically connected to an electrode or the like of another semiconductor device via the bump.
When the through electrode is used for power supply or the like, it is necessary to make the thickness of the oxide film thick for allowing a large current to flow through the through electrode. However, when the thickness of the oxide film is large, it is difficult to securely remove an excess oxide film on the silicon substrate surface. This is because the polishing rate of the oxide film is low and it takes time for polishing. Moreover, evenness of the polishing is poor, and thus it is difficult to evenly remove the oxide film on the interlayer insulating film.    [Patent Document 1] International Publication No. WO2006/080337